San Jose, CA, June 05, 2014 --(PR.com
)-- OmniPhy is a leading provider of differentiated interface IP, offering customers greater design margins and fast time-to-market for emerging standards, including 15-28Gb/s PHY designs. The company focuses on power and performance, yield, and testability - offering best-in-class silicon-proven IP in the most advanced technologies.
These highly-integrated Interface PHY’s lead the industry in jitter performance, small package size and low power consumption.
The IP Track at the 51st DAC focuses on the latest developments and approaches to IP quality. Real world examples will illustrate how methodology, design management, verification, and metrics can lead to better, more reliable products.
What: OmniPhy will present on “Managing Designs to Produce High-quality PHY IPs.” Abstract: As IP design complexity has increased significantly, so has the number of engineers involved in completing an analog IP design. While RTL and verification teams have long used design management software, including open source choices, the analog design world has been slow to adapt. Using a design management solution coupled with a well-defined design and verification methodology enabled by automation is a necessity to ensure the quality and delivery schedule of a PHY IP. This presentation highlights the issue of managing the design process to improve the quality of the IP produced, with a focus on design management.
When: The Verification topic area of the IP Track
Who: Ritesh Saraf (C.E.O) - OmniPhy, Claude Gauthier (C.O.O) – OmniPhy and Amit Varde (Applications Manager) - ClioSoft
Where: Room 101, Moscone Center, San Francisco, CA.
OmniPhy’s Interface IP portfolio for System on Chip (SOC) includes solutions for 10/100/1G Ethernet, DDR4/3, PCI Express 3.0/2.0, USB 3.0/2.0, SATA and HDMI 2.0, all of which are available now.
OmniPhy is a leading provider of high-quality, silicon-proven IP solutions for system-on-chip (SoC) Interface designs. The broad IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP and subsystems. With a robust IP development methodology, extensive investment in quality, IP prototyping and comprehensive technical support, OmniPhy enables designers to accelerate time-to-market and reduce integration risk. For more information on OmniPhy IP, visit http://omniphysemi.com.